APEXC facts for kids
The APE(X)C, or All Purpose Electronic (X) Computer series was designed by Andrew Donald Booth at Birkbeck College, London in the early 1950s. His work on the APE(X)C series was sponsored by the British Rayon Research Association. Although the naming conventions are slightly unclear, it seems the first model belonged to the BRRA. According to Booth, the X stood for X-company.
One of the series was also known as the APE(X)C or All Purpose Electronic X-Ray Computer and was sited at Birkbeck.
Contents
Background
From 1943 on, Booth started working on the determination of crystal structures using X-ray diffraction data. The computations involved were extremely tedious and there was ample incentive for automating the process and he developed an analogue computer to compute the reciprocal spacings of the diffraction pattern.
In 1947, along with his collaborator and future spouse Kathleen Britten, he spent a few months with von Neumann's team, which was the leading edge in computer research at the time.
ARC and SEC
Booth designed an electromechanical computer, the ARC (Automatic Relay Computer), in the late 1940s (1947-1948). Later on, they built an experimental electronic computer named SEC (Simple Electronic Computer, designed around 1948-1949) - and finally, the APE(X)C (All-Purpose Electronic Computer) series.
The computers were programmed by Kathleen.
The APE(X) C series
The APE(X)C series included the following machines:
- APE(X)C: Birkbeck College, London, first time operated in May 1952, ready for use at the end of 1953
- APE(N)C: Board of Mathematical Machines, Oslo ('N' likely stands for 'Norway'), also known as NUSSE
- APE(H)C: British Tabulating Machine Company (It is unclear what 'H' stands for - perhaps 'Hollerith' as the company sold Hollerith Unit record equipment
- APE(R)C: British Rayon Research Association ('R' stands for 'Rayon'), ready for use in June 1952
- UCC: University College, London (circa January 1956)
- MAC or MAGIC (Magnetic Automatic Calculator): "built by Wharf Engineering Laboratories" (February 1955)
- The HEC (Hollerith Electronic Computer), built by the British Tabulating Machine Company (later to become International Computers and Tabulators (ICT), then International Computers Limited (ICL)), a commercial machine sold in several models and later known as the ICT200 series. There were likely the derivatives HEC 1, HEC 2, HEC 2M - M for 'marketable' denoting the machine's orientation toward commercial rather than scientific customers, and HEC 4 (before 1955)
Only one of each of these machines was built, with the exception of HEC (and possibly MAC) which were commercial machines produced in quite large numbers for the time, around 150. They were similar in design, with various small differences, mostly in I/O equipment. The APEHC was a punched card machine while the APEXC, APERC and APENC were teletypers (keyboard and printer, plus paper tape reader and puncher). Also, the UCC had 8k words of storage, instead of 1k word for other machines, and the MAC used germanium diodes in replacement of many valves.
British Tabulating Machine Company machines
In March 1951, the British Tabulating Machine Company (BTM) sent a team to Andrew Booth's workshop. They then used his design to create the Hollerith Electronic Computer 1 (HEC 1) before the end of 1951. The computer was a direct copy of Andrew Booth's circuits with extra Input/output interfaces. The HEC 2 was the HEC 1 with smarter metal casings and was built for the Business Efficiency Exhibition in 1953. A slightly modified version of the HEC 2 was then marketed as HEC2M and 8 were sold. The HEC2M was succeeded by the HEC4. Around 100 HEC4s were sold in the late 1950s.
The HEC used standard punched cards; the HEC 4 had a printer, too, and it featured several instructions (such as divide) and registers not found on the APEXC.
Technical description
An emulator for the APEXC series has been developed by MESS. They describe its functioning as follows:
The APEXC is an incredibly simple machine.
Two I/O devices were supported: a paper tape reader, and a paper tape puncher. The puncher output could be fed to a printer ('teletyper') unit when desirable. Printer output is emulated and is displayed on screen. Tape input was either computer-generated by the APEXC, or hand-typed with a special 32-key keyboard (each tape row had 5 data holes (<-> bits), which makes 32 different values).
Instruction and data words are always 32 bits long. The processor uses integer arithmetic with 2's complement representation. Addresses are 10 bits long. The APEXC has no RAM, except for a 32-bit accumulator and a 32-bit data register (used along with the 32-bit accumulator to implement 64-bit shift instructions and hold the 64-bit result of a multiplication). Instructions and data are stored in two magnetic drums, for a total of 32 circular magnetic tracks of 32 words. Since the rotation rate is 3750rpm (62.5 rotations per second), the program execution speed can go from as high as the theoretical maximum of 1 kIPS to lower than 100IPS if program instructions and data are not contiguous. Nowadays, many say a pocket calculator is faster.
One oddity is that there is no program counter: each machine instruction includes the address of the next instruction. This design may sound weird, but it is the only way to achieve optimal performance with this cylinder-based memory.
The machine code is made of 15 instructions only, namely addition, subtraction, multiplication, load (3 variants), store (2 variants), conditional branch, right arithmetic bit shift, right bit rotation, punched-card input, punched-card output, machine stop, and bank-switching (which is never used on the APEXC, since it only has 1024 words of storage, and addresses are 10-bit-long). A so-called vector mode enables to repeat the same operation 32 times with 32 successive memory locations. Note the lack of bitwise and/or/xor and division. Also, note the lack of indirect addressing modes: dynamic modification of opcodes is the only way one may simulate it.
Another oddity is that the memory bus and the ALU are 1-bit-wide. There is a 64 kHz bit-clock and a 2 kHz word-clock, and each word memory and arithmetic operation is decomposed into 32 1-bit memory and arithmetic operations: this takes 32 bit cycles, for a total of 1 word cycle.
The processor is fairly efficient: most instructions take only 2 word cycles (1 for fetch, 1 for read operand and execute), with the exception of stores, shifts and multiplications. The APEXC CPU qualifies as RISC; there is no other adequate word.
Note there is no read-only memory (ROM), and therefore no bootstrap loader or default start-up program whatsoever. It is believed that no executive or operating system was ever written for the APEXC, although there were subroutine libraries of sorts for common arithmetic, I/O and debug tasks.
Operation of the machine is normally done through a control panel which allows the user to start, stop and resume the central processing unit, and to alter registers and memory when the CPU is stopped. When starting the machine, the address of the first instruction of the program to be executed must be entered in the control panel, then the run switch must be pressed. Most programs end with a stop instruction, which enables the operator to check the state of the machine, possibly run some post-mortem debugging procedures (a core dump routine is described in an APEXC programming book), then enter the address of another program and run it.
